The present invention relates to a technique of protecting circuit devices and semiconductor elements of drive circuits used in apparatus, such as plasma display apparatus, loaded by discharge cells against the destruction of element caused by abnormal operations.
A conventional technique for a drive circuit used in a plasma display apparatus will be explained first. FIG. 1 shows schematically the drive circuit used in the plasma display panel (will be termed simply "PDP"). The PDP 21 shown here is of the a.c. type, although it may be of the d.c. type.
The PDP 21 has a structure of two glass plates coupled face-to-face by being spaced out appropriately, with address electrodes 23 and scan electrodes 24 for determining light emitting points being arranged in a fashion of orthogonal matrix on the glass plates. A common sustain electrode 25 for sustaining the light emission is arranged in parallel to the scan electrodes 24. Indicated by 28 are discharge areas each defining a unit display pixel.
These electrodes 23,24 and 25 are supplied with drive pulses from an address electrode drive circuit 22, scanning drive circuit 26 and common sustaining circuit 27, respectively.
FIG. 2 is a perspective view of a typical practical PDP of the a.c. type. The PDP has its discharge electrodes including the scan electrodes 24 and common sustain electrode 25 covered with a dielectric substance and protective film for protection against the collision of ion created by discharging.
As shown in FIG. 2, the PDP 21 has a simple 3-electrode structure, in which a front panel 31 with the formation of the scan electrodes 24 and the sustain electrode 25 in the horizontal direction and a rear panel 32 with the formation of the address electrodes 23 in the vertical direction are sticked face-to-face such that the scan electrodes 24 and sustain electrode 25 are orthogonal with the address electrodes 23.
The PDP shown in FIG. 2 has the provision of barrier ribs 33 which separate fluorescent substances 34 of red, green and blue and make a proper distance between the front panel 31 and rear panel 32 so as to form discharge spaces. The scan electrodes 24 and sustain electrode 25 which need to transmit the emitted light are generally transparent electrodes which have a high electrical resistance. For the reduction of resistance of the electrode circuit, there are provided bus electrodes 35 having a small electrical resistance.
The scan electrodes 24 and sustain electrode 25 are covered with a thin film of magnesium oxide (MgO) which serves as a dielectric substance and protective film, although it is not shown in FIG. 2.
The scan electrodes 24, sustain electrode 25 and address electrodes 23 are in static coupling through the cell space and dielectric substance, as will be appreciated from the structure shown in FIG. 2. Therefore, the drive voltages of the electrodes 23,24 and 25 interferewith each other through the static coupling, and cross-talk voltages can possibly be induced. Furthermore, since the electrodes 23,24 and 25 are inside the discharge space, if abnormal discharging occurs in a cell, charges that cannot be controlled by the control voltages of these electrodes will dash into an electrode and a resulting abnormal voltage and current will be applied to the drive circuit of that electrode.
FIG. 3 depicts an example of the waveform of a current which arises due to abnormal discharging in a cell of PDP and flows into the drive circuit. The abnormal discharge current Ia, which is detected on the output terminal of the address electrode drive circuit 22, is plotted in 2 A/div scale on the vertical axis against the time t in 50 ns/div scale on the horizontal axis. FIG. 3 reveals that the current caused by abnormal discharging has an extremely large magnitude as compared with the rated output current of 30-50 mA in general of the address electrode drive circuit 22.
FIG. 4 shows the output stage of the address electrode drive circuit which is used widely in the conventional PDPS. In the case of output elements 52a and 52b formed of MOSFETs, parasitic diodes 51a and 51b are formed together with these MOSFETS. Accordingly, the characteristics of the parasitic diodes 51a and 51b have not been considered independently.
In case the abnormal discharge current Ia as shown in FIG. 3 flows through the output terminal 53 into the drive circuit having its output stage made up of output transistors 52a and 52b and parasitic diodes 51a and 51b, it flows through the parasitic diode 51a to the power source 56 by being blocked by the output transistor 52a which is reverse in connection for the current. In another case when the abnormal discharge current flows to the address electrode 23 through the output terminal 53, it flows from the ground through the parasitic diode 51b.
Accordingly, the parasitic diodes 51a and 51b need to have characteristics enough to withstand the abnormal discharge current Ia. However, the parasitic diodes 51a and 51b are formed concurrently to the formation of the output MOSFETs 52a and 52b, instead of being formed independently as mentioned previously, and therefore their design latitude is limited. On this account, it is difficult to fabricate the drive circuit which withstands the abnormal discharge current Ia.
On the other hand, in case a sharp-rising (of the order of several hundreds nanoseconds) abnormal discharge current having a large peak value, e.g.,5 A, flows from the display panel 21 to the output terminal 53, it had been conceived to flow to the power source 56 through the parasitic diode 51a. Actually, however, the inventors of the present invention found such a contradictory phenomenon that the apparent forward resistance of the parasitic diode 51a increases significantly (a large forward voltage drop emerges between the anode and cathode of the diode).
Specifically, the forward voltage drop of the parasitic diodes 51a and 51b appearing as a voltage difference between the output terminal 53 and power supply terminal 54, which should be 1 to 2 V inherently, actually produces a voltage difference as large as several volts to several tens volts due to the above-mentioned phenomenon, resulting in a high voltage emergence on the output terminal 53.
Consequently, the output transistor 52a connected between the output terminal 53 and ground terminal 55 has on its drain the direct application of the high voltage of the output terminal 53 caused by the abnormal discharge current, and this is a serious matter in regard to the voltage withstanding of the output transistor 52a. Particularly, the output transistors 52a and 52b have their withstand voltage lowered significantly when an abnormally high voltage is applied to the drain in the conductive state, and it is highly possible that these transistors 52a, 52b will be destroyed.
Breakdown of the output transistors 52a and 52b is analyzed as follows. If the output transistor 52b is in the conductive state when a positive abnormal discharge voltage is applied to the output terminal 53, this transistor 52b will first break and become a short circuit. Then, a full power voltage is applied to the output transistor 52a through the short-circuit transistor 52b, and the transistor 52a also breaks.
The withstand voltage and application voltage of the output transistors 52a and 52b in their conductive state will be explained briefly. The output transistors 52a and 52b have the highest withstand voltage in the non-conductive (cutoff) state, and the withstand voltage falls as the transistors proceed to the conductive state progressively by being forwardly biased.
In the example of FIG. 4, if the output transistor 52b connected between the output terminal 53 and ground terminal 55 (will be termed "pull-down transistor") is in the conductive state by being forwardly biased deeply at the time when the voltage of the output terminal 53 is raised by the incoming abnormal discharge current, the output transistor 52b should have a significantly low withstand voltage. In this case, if the entire surge current were to be absorbed by the pull-down transistor 52b, the output terminal 53 would not have an abnormal voltage rise irrespective of the function of the parasitic diode 51a.
However, the output transistors 52a and 52b usually have a current rating of 30-50 mA which is incomparably smaller than the abnormal discharge current, and therefore excessive charges that are not absorbed by the pull-down transistor 52b will flow to the power source 56 of the drive circuit by way of the parasitic diode 51a of the output transistor 52a connected between the output terminal 53 and power supply terminal 54 (will be termed "pull-up transistor"). This current raises the voltage of the output terminal 53, i.e., the drain voltage of the pull-down transistor 52b, possibly in excess of its withstand voltage.
In case a voltage or current of other attribution than the normal operation is created and applied to the drive circuit, if the voltage or current is in excess of the rating of the output transistors 52a and 52b, the drive circuit will break. The conventional PDP is not protected satisfactorily from these occasions, and there has been left the room for improvement for the enhancement of reliability.
The conventional drive circuit can possibly be subjected to the application of electrical energy in excess of the ratings of its component parts due to interactions between electrodes, such as cross-talk, or due to the occurrence of abnormal discharging or the like inside the panel. Although semiconductor elements used in the drive circuit have a marginal strength against breakdown in the normal operating region, it is not sufficient against an excessive voltage or current arising in the abnormal operation or a voltage or current that is applied backward relative to the normal operation.
A leak current caused by the cross-talk between electrodes in a cell and a voltage or current applied to an electrode at abnormal discharging are often greater than the voltage and current of the normal operation and are often applied reversely to the circuit components.
Another apprehension is the occurrence of abnormal operation of the PDP due to the variability in manufacturing of individual panels or the presence of extraneous substances inside cells.